Demo entry 6351129

or

   

Submitted by anonymous on Mar 18, 2017 at 14:34
Language: vhdl. Code size: 197 Bytes.

entity myor is
    Port ( a : in STD_LOGIC;
           b : in STD_LOGIC;
           x : out STD_LOGIC);
end myor;

architecture Behavioral of myor is

begin

x<=a or b;

end Behavioral;

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